1. Field of the Disclosure
The present disclosure relates to metal silicate films. In particular, the disclosure concerns methods for forming silicon-rich metal silicate films by atomic layer deposition (ALD) and the films formed by such methods.
2. Description of the Related Art
The integration level of components in integrated circuits is increasing, which rapidly places a demand for a decrease of the size of integrated circuit (IC) components and interconnects. Design rules are setting the feature sizes to ≦0.2 μm, making complete film coverage on deep bottoms and vias difficult to obtain using traditional methods. Additionally, with decreasing feature sizes, quantum mechanical tunneling (“tunneling”) leads to leakage current, i.e., current leaking out of device features (e.g., across gate oxides), which adversely affects device performance. For this reason, substantially thin SiO2 films are unreliable as gate dielectrics (gate oxides), for example, in MOSFET (metal-oxide-semiconductor field-effect transistor) devices. Thus, a dielectric material with a high dielectric constant (“high-k dielectric”) is desirable.
At least some high-k dielectric materials can be deposited on silicon surfaces and remain stable under thermal annealing processes. In gate dielectric applications, electrically active defects should be minimized or prevented from forming at interfaces between silicon wafers and high-k dielectrics. In memory applications, such as in dynamic random access memory (DRAM) applications, the structure of the dielectric can be substantially stable under high activation temperatures. It has been found that mixing silicon oxide (SiOx, where ‘x’=1 or 2) with a metal oxide forms stable metal silicates that can be used as high-k dielectrics with desirable properties.
Hafnium silicate (HfSiOx) and Zirconium silicate (ZrSiOx) have been used to replace silicon oxide in some applications, such as complementary metal oxide semiconductor (CMOS) applications, because they can offer excellent thermal stability and device performance in integrated circuits with device features sizes of about 65 nanometers (nm) or less. However, with decreasing features sizes, it has become increasingly difficult to deposit hafnium silicate films with compositional and thickness uniformities suited for current and future generation of ICs.
Metal silicate films are conventionally deposited by first contacting a substrate surface with water to form initial OH surface terminations, followed by contacting the substrate with a pulse of a metal source chemical (e.g., HfCl4) to form a metallic film on the substrate, the metallic film comprising metals with halogen ligands (e.g., Si—O—HfCl3). Subsequently contacting the metals with water replaces the halogen ligands with OH ligands. Next, a silicon source chemical (e.g., SiCl4) is contacted with the OH terminated metals to form halogen terminated silicon atoms covalently bonded to the metals (e.g., Si—O—Hf—O—SiCl3). Subsequent exposure to water replaces the halogen ligands with OH groups (e.g., Si—O—Hf—O—Si(OH)3). This process can be repeated to form a metal silicate film. With decreasing device dimensions, metal silicate films with high dielectric constants are desirable because they will minimize quantum mechanical tunneling across the dielectric. Metal silicate films with increased silicon content are desirable because they have excellent thermal stability and good interface properties. However, a limitation of the conventional processes described above is that the maximum silicon content achievable is about 65%, rendering the method unsuitable for applications in which metal silicate films with a silicon content greater than 65% are desired.